1 Field of the Invention
The invention relates to a current sense circuit, and more particularly, to an MOS current sense circuit with improved accuracy.
2 Description of the Prior Art
Current sense circuits are widely used in integrated circuits. If a potentially large output, or load, current must be driven by an on-chip switch, a current sense circuit may be used to detect the relative or absolute value of this current. The current level may be monitored to prevent damage to the switch or to the integrated circuit from either a short circuit or a simple overloading.
Referring now to FIG. 1, a simplified schematic of a current sense circuit is illustrated. This circuit illustrates a problem common in current sense circuits of the art. In this circuit, a resistive load, RLOAD 10, is driven by a low-side, NMOS transistor MOUT 14. RLOAD 10 is an external resistor that is coupled between an external voltage supply, VEXT 22, and the OUT pin of the circuit. MOUT14 is turned ON and OFF by the logic signal CONTROL 30 which is coupled to the gate of MOUT 14.
The current sense scheme of this circuit uses a simple current mirror approach wherein a mirroring device, MSENSE18, creates a sense current, ISENSE, that is proportional to the load current, ILOAD. The NMOS transistor MSENSE 18 may be constructed substantially smaller than MOUT 14. Since MSENSE18 receives the same gate drive as MOUT 14, both devices conduct at the same time. ISENSE is mirrored using the PMOS devices M338 and M442 to create the mirror current IS2.IS2flows through the sense resistor RSENSE 46 to create a voltage at node B. The voltage at node B is then compared to a reference voltage, VREF 50, using a simple comparitor circuit 54. If the voltage at B exceeds VREF 50, the comparitor enables the OC 58, or over current, output.
A key problem in this approach is the operating characteristics of MSENSE 18 and of MOUT 14. MOUT 14 is operating in the linear, or ohmic, region. Therefore, variations in ILOAD cause variations in the drain-to-source voltage across MOUT 14. Further, since MOUT 14 is designed to have a low ON resistance, this drain-to-source voltage drop is relatively small.
However, MSENSE 18 is operating in a different region. Specifically, the presence of the mirroring device M338 insures that a relatively large voltage exists at node A and, therefore, as the drain-to-source voltage of MSENSE 18. MSENSE 18 may therefore be operating in a saturation region. The drain current of MSENSE 18 may not correspond to the drain current of MOUT 14, even though both receive the same gate drive. Therefore, ISENSE may not proportionally correspond to ILOAD. On the contrary, if the circuit is altered such that MSENSE 18 is operating in the linear region, then the drain-to-source voltage must somehow be carefully controlled to track that of MOUT 14 in order to obtain a good current proportionality.
Several prior art inventions describe current sensing circuits. U.S. Pat. 5,877,617 to Ueda describes a load current sensing circuit. The gates and drains of the power and sensing MOSFETs are coupled together. A sensing resistor is coupled between the sensing transistor source and ground. Compensation resistors are used to improve temperature performance. U.S. Pat. No. 5,670,867 to Mitsuda teaches an MOS load current sensing circuit. A CMOS pair is used to feedback the drain-to-source voltage of the output device to a comparitor. A fixed voltage reference is used as the other comparitor input. U.S. Pat. No. 5,652,540 to Eilley discloses a load current sensing circuit for a bipolar driver.
A principal object of the present invention is to provide an effective and very manufacturable MOS current sense circuit.
A further object of the present invention is to provide a current sense circuit where the sense current is more accurately proportional to the load current.
A still further object of the present invention is to improve accuracy by operating both the load transistor and the sense transistor in the linear region and comparing the drain-to-source voltages.
Another still further object of the present invention is to provide an NMOS, low-side drive or a PMOS, high-side drive current sense.
Another still further object of the present invention is to provide an adjustable or trimmable current sense circuit to improve precision.
Another still further object of the present invention is to provide a current sense circuit that may be incorporated a into current limit.
In accordance with the objects of this invention, a new current sense circuit has been achieved. The current sense circuit comprises, first, a first MOS transistor having a gate, a drain, and a source. The gate is coupled to a control signal. The drain is coupled to a load such that a load current flows through the first MOS transistor when the control signal is ON. A second MOS transistor has a gate, a drain, and a source. The gate is coupled to the control signal. The drain is coupled to a constant current source such that the constant current flows through the second MOS transistor when the control signal is ON. The source is coupled to the source of the first MOS transistor. The first and second MOS transistors are operating in the linear region when the control signal is ON. Finally, a means to compare the first MOS transistor drain voltage and the second MOS transistor drain voltage is provided.